This invention relates to an etching method for semiconductor devices, more particularly to an etching process for fabricating contact holes in an insulating layer separating two metallization layers of an integrated circuit (IC).
In a process for fabricating multi-layered wirings on semiconductor devices, it is important to obtain good "step coverage" in order to manufacture devices having high reliability. Good step coverage results in continuously covering a stepped portion with a layer covering the step. Step coverage is especially important in IC processing technology to fabricate contact wiring beween the circuits fabricated on different levels or surface heights. The use of such wirings between different surface levels or between multi-wiring layers has increased with the use of large scale integrated circuits (LSI), and has increased further as the scale of integration has increased. Contact holes, through which wiring between layers are passed, are typical examples of such stepped portions.
The thickness of a conductive layer (generally aluminum film) formed on a surface having a step becomes thin at the portion covering the step, especially when the step has a sharp edge, and the wiring often breaks at the stepped portion. Therefore, it is essential to maintain a constant thickness of the conductive layer, that is, to obtain good step coverage, in order to manufacture IC's of high reliability.
In order to obtain good step coverage, usually the stepped portion is tapered or inclined. Tapering of the step is done via an etching process. For example, FIG. 1(a) is a cross section of a contact hole fabricated using a prior art plasma etching process. In FIG. 1(a), an aluminum layer 1 of a first (or lowest) wiring layer is fabricated over a semiconductor substrate (not shown) and is covered with an insulating layer 2 on which a second wiring layer should be fabricated (not shown). This insulating layer 2 is covered with a photo resist mask 3, which has a pattern including a contact hole 4 fabricated by photolithographic technology. Then the substrate is etched using plasma etching, usually by a mixture of tetrafluoromethane (CF.sub.4) and oxygen (O.sub.2) as the etchant gas. During this plasma etching process, the portion of the insulating layer 2, which is not covered by the photo resist mask 3, is etched off and the contact hole 4 is made. During this plasma etching process, as depicted in FIG. 1(a), the insulating layer 2 is also side etched, and an under-cut portion 5 is made.
This under-cut portion 5 is tapered or inclined naturally and it is a desirable structure from the view point of providing good step coverage. The prior art technology depends on this under-cut 5, but often suffers from an overhang of the side-etched insulating layer 2. If the etching temperature is raised in order to increase the etching rate, the photo resist mask 3 is heated by plasma and softened, accordingly, it often tilts down as illustrated in FIG. 1(b). If such a tilt of the photo resist 3 occurs during the middle of the etching process and the etching process is continued, the etched insulating layer 2 has an overhang 6, as depicted in FIG. 1(b).
Even if the etching rate is suppressed to a low rate in order to avoid the heating of the photo resist 3, the overhang 6 may still remain. Returning to FIG. 1(a), though the side wall 5 of the contact hole 4 at the bottom part of the under-cut 5 is inclined, the slope of the side wall at the upper part of the under-cut 5 (close to the photo resist 3) is very steep. In addition, sometimes it also has an overhang, because the insulating layer 2 adjacent to the back side of the resist 3 is not etched completely. The prior art etching process, therefore, can not completely avoid overhangs and thus provides poor step coverage, with the result that IC reliability often suffers.
There is a trend of shifting the etching process from batch processing to continuous processing on a conveyor system, to increase production. In batch processing, semiconductor slices (substrates) are processed in a batch, and a slow etching rate does not greatly effect the total processing speed. However, in a continuous processing system, the etching speed is an important factor in the production speed and a high etching rate is required for such continuous production systems.